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What is Higgs-3 Chip?
Higgs-3 is a highly integrated, 800-bit memory, single chip UHF RFID Tag IC. The chip conforms to the EPC global Class 1 Gen 2 specifi cations and provides state-of-the-art performance for a broad range of applications.
• Supply Chain Management
• Distribution Logistics
• Product Authentication
• Asset Inventory and Tracking
• Baggage Handling and Tracking
• Item Level Tagging
Industry Leading Sensitivity
Industry leading tags performance in challenging RF environments.
Saves money: Reduces the number of read points and/or minimizes tag size.
800-Bits of NVRAM
Larger memory RFID IC including 96-480 bits of EPC or up to 512-bits of user memory.
Provides fl exibility for local storage or for large bit-count EPC needs.
Enhanced IC security using a non-digital, unique and non-cloneable “fi nger-print”.
Practically eliminates copied tags being applied to counterfeit or goods of higher value.
› Meets EPCglobal Gen2 (V 1.2.0) as well as ISO/IEC 18000-6C:2004 / Amd 1:2006 (Type C)
› Worldwide operation in the RFID UHF bands (860-960 MHz)
› 800-Bits of Nonvolatile Memory
• 96-EPC Bits, extensible to 480 Bits
• 512 User Bits
• 64 Bit Unique TID
• 32 Bit Access and 32 bit Kill Passwords
› Pre-Programmed with a unique, unalterable 64-bit serial number
› User Memory can be Block Perma-Locked as well as read password protected in 64 Bit Blocks
› Supports all Mandatory and Optional Commands including Item Level Commands
› Custom Commands for high speed programming; 30 tags per second for the 96-bit EPC number
› Low power operation for both read and program
› Exceptional operating range, up to 10m with appropriate antenna
Higgs-3 operates at extremely low power levels, yet still provides suffi cient backscatter signal to read tags at an extended range. It can also be programmed at low RF power and, in conjunction with a custom command - LoadImage - can be programmed at high speed. Higgs-3 is implemented in a low cost CMOS process and uses proven and cost effective EEPROM technology.
Higgs-3 offers a flexible memory architecture that provides for the optimum allocation of EPC and User memory for different use cases such as legacy part numbering systems and service history. User memory can also be read and or write locked on 64-bit boundaries, supporting a variety of public/private usage models.
The IC also features a factory programmed 64-bit serial number that cannot be altered. In conjunction with the EPC code, this provides a unique“fingerprint”for the tagged item.